Abstract: Multiple device configurations, especially in 2.5D or 3D systems, are intimately tied to the successful implementation of very fine pitch, flip chip interconnection in order to optimize their potential for higher performance and smaller form factor. At the same time, such pitch reduction and increased I/O count create greater challenges to the interconnection process and its resulting reliability, imposing a greater focus on the overall process definition for these systems in a package, including the need to develop a suitable process to remove...
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Topics: 
Reliability engineering